Parallel systems that support the shared memory abstraction are becoming
widely accepted in many areas of computing. Writing correct and efficient
programs for such systems requires a formal specification of memory semantics,
called a memory consistency model. The most intuitive model---sequential
consistency---greatly restricts the use of many performance optimizations commonly
used by uniprocessor hardware and compiler designers, thereby reducing
the benefit of using a multiprocessor. To alleviate this problem, many current
multiprocessors support more relaxed consistency models. Unfortunately, the
models supported by various systems differ from each other in subtle yet important
ways. Furthermore, precisely defining the semantics of each model often
leads to complex specifications that are difficult to understand for typical users
and builders of computer systems...
Read the entire research document here: ftp://gatekeeper.dec.com/pub/DEC/WRL/research-reports/WRL-TR-95.7.pdf
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